diff --git a/Test/Test.kicad_pcb b/Test/Test.kicad_pcb
new file mode 100644
index 0000000..8aa905a
--- /dev/null
+++ b/Test/Test.kicad_pcb
@@ -0,0 +1,1639 @@
+(kicad_pcb (version 20171130) (host pcbnew "(5.1.9)-1")
+
+  (general
+    (thickness 1.6)
+    (drawings 8)
+    (tracks 37)
+    (zones 0)
+    (modules 4)
+    (nets 37)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 1)
+    (user_trace_width 1)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (via_size 0.8)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0)
+    (aux_axis_origin 0 0)
+    (visible_elements 7FFFFFFF)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 "Net-(J1-Pad20)")
+  (net 2 "Net-(J1-Pad19)")
+  (net 3 GND)
+  (net 4 "Net-(J1-Pad17)")
+  (net 5 "Net-(J1-Pad16)")
+  (net 6 "Net-(J1-Pad15)")
+  (net 7 "Net-(J1-Pad14)")
+  (net 8 "Net-(J1-Pad12)")
+  (net 9 "Net-(J1-Pad11)")
+  (net 10 "Net-(J1-Pad10)")
+  (net 11 "Net-(J1-Pad9)")
+  (net 12 "Net-(J1-Pad7)")
+  (net 13 "Net-(J1-Pad6)")
+  (net 14 "Net-(J1-Pad5)")
+  (net 15 "Net-(J1-Pad4)")
+  (net 16 "Net-(J1-Pad2)")
+  (net 17 "Net-(J1-Pad1)")
+  (net 18 "Net-(J2-Pad20)")
+  (net 19 "Net-(J2-Pad19)")
+  (net 20 "Net-(J2-Pad17)")
+  (net 21 "Net-(J2-Pad16)")
+  (net 22 "Net-(J2-Pad15)")
+  (net 23 "Net-(J2-Pad14)")
+  (net 24 "Net-(J2-Pad12)")
+  (net 25 "Net-(J2-Pad11)")
+  (net 26 "Net-(J2-Pad10)")
+  (net 27 "Net-(J2-Pad9)")
+  (net 28 "Net-(J2-Pad8)")
+  (net 29 "Net-(J2-Pad7)")
+  (net 30 "Net-(J2-Pad6)")
+  (net 31 "Net-(J2-Pad5)")
+  (net 32 "Net-(J2-Pad4)")
+  (net 33 "Net-(J2-Pad2)")
+  (net 34 "Net-(J2-Pad1)")
+  (net 35 "Net-(J3-Pad3)")
+  (net 36 "Net-(J3-Pad1)")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.8)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net GND)
+    (add_net "Net-(J1-Pad1)")
+    (add_net "Net-(J1-Pad10)")
+    (add_net "Net-(J1-Pad11)")
+    (add_net "Net-(J1-Pad12)")
+    (add_net "Net-(J1-Pad14)")
+    (add_net "Net-(J1-Pad15)")
+    (add_net "Net-(J1-Pad16)")
+    (add_net "Net-(J1-Pad17)")
+    (add_net "Net-(J1-Pad19)")
+    (add_net "Net-(J1-Pad2)")
+    (add_net "Net-(J1-Pad20)")
+    (add_net "Net-(J1-Pad4)")
+    (add_net "Net-(J1-Pad5)")
+    (add_net "Net-(J1-Pad6)")
+    (add_net "Net-(J1-Pad7)")
+    (add_net "Net-(J1-Pad9)")
+    (add_net "Net-(J2-Pad1)")
+    (add_net "Net-(J2-Pad10)")
+    (add_net "Net-(J2-Pad11)")
+    (add_net "Net-(J2-Pad12)")
+    (add_net "Net-(J2-Pad14)")
+    (add_net "Net-(J2-Pad15)")
+    (add_net "Net-(J2-Pad16)")
+    (add_net "Net-(J2-Pad17)")
+    (add_net "Net-(J2-Pad19)")
+    (add_net "Net-(J2-Pad2)")
+    (add_net "Net-(J2-Pad20)")
+    (add_net "Net-(J2-Pad4)")
+    (add_net "Net-(J2-Pad5)")
+    (add_net "Net-(J2-Pad6)")
+    (add_net "Net-(J2-Pad7)")
+    (add_net "Net-(J2-Pad8)")
+    (add_net "Net-(J2-Pad9)")
+    (add_net "Net-(J3-Pad1)")
+    (add_net "Net-(J3-Pad3)")
+  )
+
+  (module Connector_PinSocket_2.54mm:PinSocket_1x03_P2.54mm_Vertical (layer F.Cu) (tedit 5A19A429) (tstamp 602C166D)
+    (at 76.18 103.25 270)
+    (descr "Through hole straight socket strip, 1x03, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
+    (tags "Through hole socket strip THT 1x03 2.54mm single row")
+    (path /602C32A2)
+    (fp_text reference J3 (at -0.29 -2.25 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn_01x03 (at -0.29 4.25 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at -0.29 1) (layer F.Fab)
+      (effects (font (size 0.9 0.9) (thickness 0.14)))
+    )
+    (fp_line (start -1.27 -1.27) (end 0.635 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 -0.635) (end 1.27 6.35) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 6.35) (end -1.27 6.35) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 6.35) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 1.27) (end -1.33 6.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 6.41) (end 1.33 6.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.33 1.27) (end 1.33 6.41) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.33 -1.33) (end 1.33 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.8 -1.8) (end 1.75 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 -1.8) (end 1.75 6.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 6.85) (end -1.8 6.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 6.85) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+    (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 35 "Net-(J3-Pad3)"))
+    (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 36 "Net-(J3-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x03_P2.54mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_PinSocket_2.54mm:PinSocket_1x20_P2.54mm_Vertical (layer F.Cu) (tedit 5A19A41E) (tstamp 602BCD90)
+    (at 55.75 45.75)
+    (descr "Through hole straight socket strip, 1x20, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
+    (tags "Through hole socket strip THT 1x20 2.54mm single row")
+    (path /602BA731)
+    (fp_text reference J1 (at -0.29 -2.25) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn_01x20 (at -0.29 21.25) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at -0.29 9.5 90) (layer F.Fab)
+      (effects (font (size 0.9 0.9) (thickness 0.14)))
+    )
+    (fp_line (start -1.27 -1.27) (end 0.635 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 -0.635) (end 1.27 49.53) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 49.53) (end -1.27 49.53) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 49.53) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 1.27) (end -1.33 49.59) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 49.59) (end 1.33 49.59) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.33 1.27) (end 1.33 49.59) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.33 -1.33) (end 1.33 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.8 -1.8) (end 1.75 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 -1.8) (end 1.75 50) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 50) (end -1.8 50) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 50) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+    (pad 20 thru_hole oval (at 0 48.26) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad20)"))
+    (pad 19 thru_hole oval (at 0 45.72) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 2 "Net-(J1-Pad19)"))
+    (pad 18 thru_hole oval (at 0 43.18) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 17 thru_hole oval (at 0 40.64) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 4 "Net-(J1-Pad17)"))
+    (pad 16 thru_hole oval (at 0 38.1) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 5 "Net-(J1-Pad16)"))
+    (pad 15 thru_hole oval (at 0 35.56) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 6 "Net-(J1-Pad15)"))
+    (pad 14 thru_hole oval (at 0 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 7 "Net-(J1-Pad14)"))
+    (pad 13 thru_hole oval (at 0 30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 12 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 8 "Net-(J1-Pad12)"))
+    (pad 11 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 9 "Net-(J1-Pad11)"))
+    (pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 10 "Net-(J1-Pad10)"))
+    (pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 11 "Net-(J1-Pad9)"))
+    (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 12 "Net-(J1-Pad7)"))
+    (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 13 "Net-(J1-Pad6)"))
+    (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 14 "Net-(J1-Pad5)"))
+    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 15 "Net-(J1-Pad4)"))
+    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 16 "Net-(J1-Pad2)"))
+    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 17 "Net-(J1-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x20_P2.54mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_PinSocket_2.54mm:PinSocket_1x20_P2.54mm_Vertical (layer F.Cu) (tedit 5A19A41E) (tstamp 602BCF21)
+    (at 91.5 45.75)
+    (descr "Through hole straight socket strip, 1x20, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
+    (tags "Through hole socket strip THT 1x20 2.54mm single row")
+    (path /602BCD5D)
+    (fp_text reference J2 (at -0.29 -2.25) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn_01x20 (at -0.29 21.25) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at -0.29 9.5 90) (layer F.Fab)
+      (effects (font (size 0.9 0.9) (thickness 0.14)))
+    )
+    (fp_line (start -1.27 -1.27) (end 0.635 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 -0.635) (end 1.27 49.53) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.27 49.53) (end -1.27 49.53) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 49.53) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 1.27) (end -1.33 49.59) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 49.59) (end 1.33 49.59) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.33 1.27) (end 1.33 49.59) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.33 -1.33) (end 1.33 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.8 -1.8) (end 1.75 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 -1.8) (end 1.75 50) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 50) (end -1.8 50) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 50) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+    (pad 20 thru_hole oval (at 0 48.26) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 18 "Net-(J2-Pad20)"))
+    (pad 19 thru_hole oval (at 0 45.72) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 19 "Net-(J2-Pad19)"))
+    (pad 18 thru_hole oval (at 0 43.18) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 17 thru_hole oval (at 0 40.64) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 20 "Net-(J2-Pad17)"))
+    (pad 16 thru_hole oval (at 0 38.1) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 21 "Net-(J2-Pad16)"))
+    (pad 15 thru_hole oval (at 0 35.56) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 22 "Net-(J2-Pad15)"))
+    (pad 14 thru_hole oval (at 0 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 23 "Net-(J2-Pad14)"))
+    (pad 13 thru_hole oval (at 0 30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 12 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 24 "Net-(J2-Pad12)"))
+    (pad 11 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 25 "Net-(J2-Pad11)"))
+    (pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 26 "Net-(J2-Pad10)"))
+    (pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 27 "Net-(J2-Pad9)"))
+    (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 28 "Net-(J2-Pad8)"))
+    (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 29 "Net-(J2-Pad7)"))
+    (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 30 "Net-(J2-Pad6)"))
+    (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 31 "Net-(J2-Pad5)"))
+    (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 32 "Net-(J2-Pad4)"))
+    (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 3 GND))
+    (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 33 "Net-(J2-Pad2)"))
+    (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 34 "Net-(J2-Pad1)"))
+    (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x20_P2.54mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module MCU_RaspberryPi_and_Boards:RPi_Pico_SMD_TH (layer F.Cu) (tedit 6029C216) (tstamp 602A2A11)
+    (at 73.64 69.88)
+    (descr "Through hole straight pin header, 2x20, 2.54mm pitch, double rows")
+    (tags "Through hole pin header THT 2x20 2.54mm double row")
+    (path /6029BF78)
+    (fp_text reference U1 (at 0 0) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Pico (at 0 2.159) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.1 25.5) (end 1.5 25.5) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.5 25.5) (end -1.1 25.5) (layer F.SilkS) (width 0.12))
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diff --git a/Test/Test.net b/Test/Test.net
new file mode 100644
index 0000000..bd908c3
--- /dev/null
+++ b/Test/Test.net
@@ -0,0 +1,263 @@
+(export (version D)
+  (design
+    (source "D:\\OneDrive\\IoT\\Learn\\Learn KiCad\\Test\\Test.sch")
+    (date "16/02/2021 13:32:28")
+    (tool "Eeschema (5.1.9)-1")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source Test.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref U1)
+      (value Pico)
+      (footprint MCU_RaspberryPi_and_Boards:RPi_Pico_SMD_TH)
+      (libsource (lib MCU_RaspberryPi_and_Boards) (part Pico) (description ""))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 6029BF78))
+    (comp (ref J1)
+      (value Conn_01x20)
+      (footprint Connector_PinSocket_1.00mm:PinSocket_1x20_P1.00mm_Vertical)
+      (datasheet ~)
+      (libsource (lib Connector_Generic) (part Conn_01x20) (description "Generic connector, single row, 01x20, script generated (kicad-library-utils/schlib/autogen/connector/)"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 602BA731))
+    (comp (ref J2)
+      (value Conn_01x20)
+      (footprint Connector_PinSocket_1.00mm:PinSocket_1x20_P1.00mm_Vertical)
+      (datasheet ~)
+      (libsource (lib Connector_Generic) (part Conn_01x20) (description "Generic connector, single row, 01x20, script generated (kicad-library-utils/schlib/autogen/connector/)"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 602BCD5D))
+    (comp (ref J3)
+      (value Conn_01x03)
+      (footprint Connector_PinSocket_1.00mm:PinSocket_1x03_P1.00mm_Vertical)
+      (datasheet ~)
+      (libsource (lib Connector_Generic) (part Conn_01x03) (description "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)"))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 602C32A2)))
+  (libparts
+    (libpart (lib Connector_Generic) (part Conn_01x03)
+      (description "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)")
+      (docs ~)
+      (footprints
+        (fp Connector*:*_1x??_*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Conn_01x03))
+      (pins
+        (pin (num 1) (name Pin_1) (type passive))
+        (pin (num 2) (name Pin_2) (type passive))
+        (pin (num 3) (name Pin_3) (type passive))))
+    (libpart (lib Connector_Generic) (part Conn_01x20)
+      (description "Generic connector, single row, 01x20, script generated (kicad-library-utils/schlib/autogen/connector/)")
+      (docs ~)
+      (footprints
+        (fp Connector*:*_1x??_*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) Conn_01x20))
+      (pins
+        (pin (num 1) (name Pin_1) (type passive))
+        (pin (num 2) (name Pin_2) (type passive))
+        (pin (num 3) (name Pin_3) (type passive))
+        (pin (num 4) (name Pin_4) (type passive))
+        (pin (num 5) (name Pin_5) (type passive))
+        (pin (num 6) (name Pin_6) (type passive))
+        (pin (num 7) (name Pin_7) (type passive))
+        (pin (num 8) (name Pin_8) (type passive))
+        (pin (num 9) (name Pin_9) (type passive))
+        (pin (num 10) (name Pin_10) (type passive))
+        (pin (num 11) (name Pin_11) (type passive))
+        (pin (num 12) (name Pin_12) (type passive))
+        (pin (num 13) (name Pin_13) (type passive))
+        (pin (num 14) (name Pin_14) (type passive))
+        (pin (num 15) (name Pin_15) (type passive))
+        (pin (num 16) (name Pin_16) (type passive))
+        (pin (num 17) (name Pin_17) (type passive))
+        (pin (num 18) (name Pin_18) (type passive))
+        (pin (num 19) (name Pin_19) (type passive))
+        (pin (num 20) (name Pin_20) (type passive))))
+    (libpart (lib MCU_RaspberryPi_and_Boards) (part Pico)
+      (fields
+        (field (name Reference) U)
+        (field (name Value) Pico)
+        (field (name Footprint) RPi_Pico:RPi_Pico_SMD_TH))
+      (pins
+        (pin (num 1) (name GPIO0) (type BiDi))
+        (pin (num 2) (name GPIO1) (type BiDi))
+        (pin (num 3) (name GND) (type power_in))
+        (pin (num 4) (name GPIO2) (type BiDi))
+        (pin (num 5) (name GPIO3) (type BiDi))
+        (pin (num 6) (name GPIO4) (type BiDi))
+        (pin (num 7) (name GPIO5) (type BiDi))
+        (pin (num 8) (name GND) (type power_in))
+        (pin (num 9) (name GPIO6) (type BiDi))
+        (pin (num 10) (name GPIO7) (type BiDi))
+        (pin (num 11) (name GPIO8) (type BiDi))
+        (pin (num 12) (name GPIO9) (type BiDi))
+        (pin (num 13) (name GND) (type power_in))
+        (pin (num 14) (name GPIO10) (type BiDi))
+        (pin (num 15) (name GPIO11) (type BiDi))
+        (pin (num 16) (name GPIO12) (type BiDi))
+        (pin (num 17) (name GPIO13) (type BiDi))
+        (pin (num 18) (name GND) (type power_in))
+        (pin (num 19) (name GPIO14) (type BiDi))
+        (pin (num 20) (name GPIO15) (type BiDi))
+        (pin (num 21) (name GPIO16) (type BiDi))
+        (pin (num 22) (name GPIO17) (type BiDi))
+        (pin (num 23) (name GND) (type power_in))
+        (pin (num 24) (name GPIO18) (type BiDi))
+        (pin (num 25) (name GPIO19) (type BiDi))
+        (pin (num 26) (name GPIO20) (type BiDi))
+        (pin (num 27) (name GPIO21) (type BiDi))
+        (pin (num 28) (name GND) (type power_in))
+        (pin (num 29) (name GPIO22) (type BiDi))
+        (pin (num 30) (name RUN) (type input))
+        (pin (num 31) (name GPIO26_ADC0) (type BiDi))
+        (pin (num 32) (name GPIO27_ADC1) (type BiDi))
+        (pin (num 33) (name AGND) (type power_in))
+        (pin (num 34) (name GPIO28_ADC2) (type BiDi))
+        (pin (num 35) (name ADC_VREF) (type unspc))
+        (pin (num 36) (name 3V3) (type unspc))
+        (pin (num 37) (name 3V3_EN) (type input))
+        (pin (num 38) (name GND) (type BiDi))
+        (pin (num 39) (name VSYS) (type unspc))
+        (pin (num 40) (name VBUS) (type unspc))
+        (pin (num 41) (name SWCLK) (type input))
+        (pin (num 42) (name GND) (type power_in))
+        (pin (num 43) (name SWDIO) (type BiDi)))))
+  (libraries
+    (library (logical Connector_Generic)
+      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Connector_Generic.lib"))
+    (library (logical MCU_RaspberryPi_and_Boards)
+      (uri "D:/OneDrive/IoT/Tools/KiCad/RP-Pico Libraries/MCU_RaspberryPi_and_Boards.lib")))
+  (nets
+    (net (code 1) (name "Net-(J2-Pad4)")
+      (node (ref J2) (pin 4))
+      (node (ref U1) (pin 37)))
+    (net (code 2) (name "Net-(J1-Pad6)")
+      (node (ref J1) (pin 6))
+      (node (ref U1) (pin 6)))
+    (net (code 3) (name "Net-(J1-Pad5)")
+      (node (ref J1) (pin 5))
+      (node (ref U1) (pin 5)))
+    (net (code 4) (name "Net-(J1-Pad4)")
+      (node (ref U1) (pin 4))
+      (node (ref J1) (pin 4)))
+    (net (code 5) (name "Net-(J1-Pad2)")
+      (node (ref U1) (pin 2))
+      (node (ref J1) (pin 2)))
+    (net (code 6) (name "Net-(J1-Pad1)")
+      (node (ref U1) (pin 1))
+      (node (ref J1) (pin 1)))
+    (net (code 7) (name "Net-(J2-Pad1)")
+      (node (ref U1) (pin 40))
+      (node (ref J2) (pin 1)))
+    (net (code 8) (name "Net-(J2-Pad2)")
+      (node (ref U1) (pin 39))
+      (node (ref J2) (pin 2)))
+    (net (code 9) (name "Net-(J1-Pad7)")
+      (node (ref J1) (pin 7))
+      (node (ref U1) (pin 7)))
+    (net (code 10) (name "Net-(J2-Pad5)")
+      (node (ref U1) (pin 36))
+      (node (ref J2) (pin 5)))
+    (net (code 11) (name "Net-(J2-Pad6)")
+      (node (ref J2) (pin 6))
+      (node (ref U1) (pin 35)))
+    (net (code 12) (name "Net-(J2-Pad7)")
+      (node (ref J2) (pin 7))
+      (node (ref U1) (pin 34)))
+    (net (code 13) (name "Net-(J2-Pad9)")
+      (node (ref J2) (pin 9))
+      (node (ref U1) (pin 32)))
+    (net (code 14) (name "Net-(J2-Pad10)")
+      (node (ref J2) (pin 10))
+      (node (ref U1) (pin 31)))
+    (net (code 15) (name "Net-(J2-Pad11)")
+      (node (ref J2) (pin 11))
+      (node (ref U1) (pin 30)))
+    (net (code 16) (name "Net-(J2-Pad12)")
+      (node (ref J2) (pin 12))
+      (node (ref U1) (pin 29)))
+    (net (code 17) (name "Net-(J2-Pad14)")
+      (node (ref J2) (pin 14))
+      (node (ref U1) (pin 27)))
+    (net (code 18) (name "Net-(J1-Pad17)")
+      (node (ref U1) (pin 17))
+      (node (ref J1) (pin 17)))
+    (net (code 19) (name "Net-(J2-Pad8)")
+      (node (ref U1) (pin 33))
+      (node (ref J2) (pin 8)))
+    (net (code 20) (name "Net-(J3-Pad1)")
+      (node (ref U1) (pin 43))
+      (node (ref J3) (pin 1)))
+    (net (code 21) (name "Net-(J3-Pad3)")
+      (node (ref U1) (pin 41))
+      (node (ref J3) (pin 3)))
+    (net (code 22) (name "Net-(J1-Pad20)")
+      (node (ref J1) (pin 20))
+      (node (ref U1) (pin 20)))
+    (net (code 23) (name "Net-(J1-Pad19)")
+      (node (ref J1) (pin 19))
+      (node (ref U1) (pin 19)))
+    (net (code 24) (name "Net-(J2-Pad15)")
+      (node (ref J2) (pin 15))
+      (node (ref U1) (pin 26)))
+    (net (code 25) (name "Net-(J1-Pad16)")
+      (node (ref J1) (pin 16))
+      (node (ref U1) (pin 16)))
+    (net (code 26) (name "Net-(J1-Pad15)")
+      (node (ref U1) (pin 15))
+      (node (ref J1) (pin 15)))
+    (net (code 27) (name "Net-(J1-Pad14)")
+      (node (ref J1) (pin 14))
+      (node (ref U1) (pin 14)))
+    (net (code 28) (name "Net-(J1-Pad12)")
+      (node (ref U1) (pin 12))
+      (node (ref J1) (pin 12)))
+    (net (code 29) (name "Net-(J1-Pad11)")
+      (node (ref U1) (pin 11))
+      (node (ref J1) (pin 11)))
+    (net (code 30) (name "Net-(J1-Pad10)")
+      (node (ref U1) (pin 10))
+      (node (ref J1) (pin 10)))
+    (net (code 31) (name "Net-(J1-Pad9)")
+      (node (ref J1) (pin 9))
+      (node (ref U1) (pin 9)))
+    (net (code 32) (name GND)
+      (node (ref U1) (pin 18))
+      (node (ref J3) (pin 2))
+      (node (ref U1) (pin 23))
+      (node (ref J1) (pin 8))
+      (node (ref J2) (pin 13))
+      (node (ref J2) (pin 18))
+      (node (ref J2) (pin 3))
+      (node (ref U1) (pin 8))
+      (node (ref J1) (pin 13))
+      (node (ref J1) (pin 18))
+      (node (ref J1) (pin 3))
+      (node (ref U1) (pin 42))
+      (node (ref U1) (pin 13))
+      (node (ref U1) (pin 38))
+      (node (ref U1) (pin 28))
+      (node (ref U1) (pin 3)))
+    (net (code 33) (name "Net-(J2-Pad16)")
+      (node (ref J2) (pin 16))
+      (node (ref U1) (pin 25)))
+    (net (code 34) (name "Net-(J2-Pad17)")
+      (node (ref U1) (pin 24))
+      (node (ref J2) (pin 17)))
+    (net (code 35) (name "Net-(J2-Pad19)")
+      (node (ref J2) (pin 19))
+      (node (ref U1) (pin 22)))
+    (net (code 36) (name "Net-(J2-Pad20)")
+      (node (ref J2) (pin 20))
+      (node (ref U1) (pin 21)))))
\ No newline at end of file
diff --git a/Test/Test.pro b/Test/Test.pro
new file mode 100644
index 0000000..aba3aba
--- /dev/null
+++ b/Test/Test.pro
@@ -0,0 +1,249 @@
+update=16/02/2021 19:23:38
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=Pcbnew
+SpiceAjustPassiveValues=0
+LabSize=50
+ERC_TestSimilarLabels=1
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=Test.net
+CopperLayerCount=2
+BoardThickness=1.6
+AllowMicroVias=0
+AllowBlindVias=0
+RequireCourtyardDefinitions=0
+ProhibitOverlappingCourtyards=1
+MinTrackWidth=0.2
+MinViaDiameter=0.4
+MinViaDrill=0.3
+MinMicroViaDiameter=0.2
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.25
+TrackWidth2=1
+ViaDiameter1=0.8
+ViaDrill1=0.4
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.12
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=1.5
+CopperTextSizeH=1.5
+CopperTextThickness=0.3
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.05
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+SolderPasteClearance=0
+SolderPasteRatio=-0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=In1.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In2.Cu]
+Name=In2.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In4.Cu]
+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In8.Cu]
+Name=In8.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In9.Cu]
+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In15.Cu]
+Name=In15.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In16.Cu]
+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In18.Cu]
+Name=In18.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In19.Cu]
+Name=In19.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In20.Cu]
+Name=In20.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In21.Cu]
+Name=In21.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In22.Cu]
+Name=In22.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In23.Cu]
+Name=In23.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In24.Cu]
+Name=In24.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In25.Cu]
+Name=In25.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In26.Cu]
+Name=In26.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In27.Cu]
+Name=In27.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In28.Cu]
+Name=In28.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In29.Cu]
+Name=In29.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In30.Cu]
+Name=In30.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.B.Cu]
+Name=B.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.B.Adhes]
+Enabled=1
+[pcbnew/Layer.F.Adhes]
+Enabled=1
+[pcbnew/Layer.B.Paste]
+Enabled=1
+[pcbnew/Layer.F.Paste]
+Enabled=1
+[pcbnew/Layer.B.SilkS]
+Enabled=1
+[pcbnew/Layer.F.SilkS]
+Enabled=1
+[pcbnew/Layer.B.Mask]
+Enabled=1
+[pcbnew/Layer.F.Mask]
+Enabled=1
+[pcbnew/Layer.Dwgs.User]
+Enabled=1
+[pcbnew/Layer.Cmts.User]
+Enabled=1
+[pcbnew/Layer.Eco1.User]
+Enabled=1
+[pcbnew/Layer.Eco2.User]
+Enabled=1
+[pcbnew/Layer.Edge.Cuts]
+Enabled=1
+[pcbnew/Layer.Margin]
+Enabled=1
+[pcbnew/Layer.B.CrtYd]
+Enabled=1
+[pcbnew/Layer.F.CrtYd]
+Enabled=1
+[pcbnew/Layer.B.Fab]
+Enabled=1
+[pcbnew/Layer.F.Fab]
+Enabled=1
+[pcbnew/Layer.Rescue]
+Enabled=0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/Default]
+Name=Default
+Clearance=0.2
+TrackWidth=0.25
+ViaDiameter=0.8
+ViaDrill=0.4
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
diff --git a/Test/Test.sch b/Test/Test.sch
new file mode 100644
index 0000000..ff3c3c8
--- /dev/null
+++ b/Test/Test.sch
@@ -0,0 +1,213 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L MCU_RaspberryPi_and_Boards:Pico U1
+U 1 1 6029BF78
+P 4000 3050
+F 0 "U1" H 4000 4265 50  0000 C CNN
+F 1 "Pico" H 4000 4174 50  0000 C CNN
+F 2 "MCU_RaspberryPi_and_Boards:RPi_Pico_SMD_TH" V 4000 3050 50  0001 C CNN
+F 3 "" H 4000 3050 50  0001 C CNN
+	1    4000 3050
+	1    0    0    -1  
+$EndComp
+$Comp
+L Connector_Generic:Conn_01x20 J1
+U 1 1 602BA731
+P 2150 3000
+F 0 "J1" H 2068 4117 50  0000 C CNN
+F 1 "Conn_01x20" H 2068 4026 50  0000 C CNN
+F 2 "Connector_PinSocket_1.00mm:PinSocket_1x20_P1.00mm_Vertical" H 2150 3000 50  0001 C CNN
+F 3 "~" H 2150 3000 50  0001 C CNN
+	1    2150 3000
+	-1   0    0    -1  
+$EndComp
+$Comp
+L Connector_Generic:Conn_01x20 J2
+U 1 1 602BCD5D
+P 5700 3000
+F 0 "J2" H 5780 2992 50  0000 L CNN
+F 1 "Conn_01x20" H 5780 2901 50  0000 L CNN
+F 2 "Connector_PinSocket_1.00mm:PinSocket_1x20_P1.00mm_Vertical" H 5700 3000 50  0001 C CNN
+F 3 "~" H 5700 3000 50  0001 C CNN
+	1    5700 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L Connector_Generic:Conn_01x03 J3
+U 1 1 602C32A2
+P 4000 4600
+F 0 "J3" V 3872 4780 50  0000 L CNN
+F 1 "Conn_01x03" V 3963 4780 50  0000 L CNN
+F 2 "Connector_PinSocket_1.00mm:PinSocket_1x03_P1.00mm_Vertical" H 4000 4600 50  0001 C CNN
+F 3 "~" H 4000 4600 50  0001 C CNN
+	1    4000 4600
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	2350 4000 3300 4000
+Wire Wire Line
+	3300 3900 2350 3900
+Wire Wire Line
+	2350 3800 2750 3800
+Wire Wire Line
+	2350 3700 3300 3700
+Wire Wire Line
+	2350 3600 3300 3600
+Wire Wire Line
+	3300 3500 2350 3500
+Wire Wire Line
+	2350 3400 3300 3400
+Wire Wire Line
+	3300 3300 2750 3300
+Wire Wire Line
+	2350 3200 3300 3200
+Wire Wire Line
+	2350 3100 3300 3100
+Wire Wire Line
+	2350 3000 3300 3000
+Wire Wire Line
+	2350 2900 3300 2900
+Wire Wire Line
+	2350 2800 2750 2800
+Wire Wire Line
+	2350 2700 3300 2700
+Wire Wire Line
+	2350 2600 3300 2600
+Wire Wire Line
+	2350 2500 3300 2500
+Wire Wire Line
+	2350 2400 3300 2400
+Wire Wire Line
+	2350 2300 2750 2300
+Wire Wire Line
+	2350 2200 3300 2200
+Wire Wire Line
+	2350 2100 3300 2100
+Wire Wire Line
+	4700 2100 5500 2100
+Wire Wire Line
+	5500 2200 4700 2200
+Wire Wire Line
+	4700 2300 5150 2300
+Wire Wire Line
+	5500 2400 4700 2400
+Wire Wire Line
+	4700 2500 5500 2500
+Wire Wire Line
+	5500 2600 4700 2600
+Wire Wire Line
+	4700 2700 5500 2700
+Wire Wire Line
+	4700 2900 5500 2900
+Wire Wire Line
+	5500 3000 4700 3000
+Wire Wire Line
+	4700 3100 5500 3100
+Wire Wire Line
+	5500 3200 4700 3200
+Wire Wire Line
+	4700 3300 5150 3300
+Wire Wire Line
+	5500 3400 4700 3400
+Wire Wire Line
+	4700 3500 5500 3500
+Wire Wire Line
+	5500 3600 4700 3600
+Wire Wire Line
+	4700 3700 5500 3700
+Wire Wire Line
+	5500 3800 5150 3800
+Wire Wire Line
+	4700 3900 5500 3900
+Wire Wire Line
+	5500 4000 4700 4000
+Wire Wire Line
+	4100 4400 4100 4200
+Wire Wire Line
+	4000 4400 4000 4300
+Wire Wire Line
+	3900 4400 3900 4200
+$Comp
+L power:GND #PWR0101
+U 1 1 602D7FE3
+P 2750 4450
+F 0 "#PWR0101" H 2750 4200 50  0001 C CNN
+F 1 "GND" H 2755 4277 50  0000 C CNN
+F 2 "" H 2750 4450 50  0001 C CNN
+F 3 "" H 2750 4450 50  0001 C CNN
+	1    2750 4450
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2750 4450 2750 4300
+Connection ~ 4000 4300
+Wire Wire Line
+	4000 4300 4000 4200
+Wire Wire Line
+	2750 4300 4000 4300
+Connection ~ 2750 4300
+$Comp
+L power:PWR_FLAG #FLG0101
+U 1 1 602E1541
+P 2750 4300
+F 0 "#FLG0101" H 2750 4375 50  0001 C CNN
+F 1 "PWR_FLAG" V 2750 4428 50  0000 L CNN
+F 2 "" H 2750 4300 50  0001 C CNN
+F 3 "~" H 2750 4300 50  0001 C CNN
+	1    2750 4300
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	2750 4300 2750 3800
+Connection ~ 2750 3800
+Wire Wire Line
+	2750 3800 3300 3800
+Wire Wire Line
+	2750 3800 2750 3300
+Connection ~ 2750 3300
+Wire Wire Line
+	2750 3300 2350 3300
+Wire Wire Line
+	2750 3300 2750 2800
+Connection ~ 2750 2800
+Wire Wire Line
+	2750 2800 3300 2800
+Wire Wire Line
+	2750 2800 2750 2300
+Connection ~ 2750 2300
+Wire Wire Line
+	2750 2300 3300 2300
+Wire Wire Line
+	4000 4300 5150 4300
+Wire Wire Line
+	5150 4300 5150 3800
+Connection ~ 5150 3800
+Wire Wire Line
+	5150 3800 4700 3800
+Wire Wire Line
+	5150 3800 5150 3300
+Connection ~ 5150 3300
+Wire Wire Line
+	5150 3300 5500 3300
+Wire Wire Line
+	5150 3300 5150 2300
+Connection ~ 5150 2300
+Wire Wire Line
+	5150 2300 5500 2300
+Wire Wire Line
+	5500 2800 4700 2800
+$EndSCHEMATC