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Adding design rules for PCBWay

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Seth Hillbrand
2019-07-19 11:37:43 -07:00
parent a4ebe5dc5f
commit e3c36eb6b8
7 changed files with 1232 additions and 0 deletions
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PCBWay/PCBWay-cache.lib Normal file
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
#End Library